每日轻资讯Daily Notes

从洁净室、InP 光子芯片到封装地图:今天三个平台信号。From cleanrooms and InP photonics to packaging maps: three platform signals.

今天的共同点不是某一种单点工艺,而是“平台化”:洁净室训练、pilot line 放大、封装设施地图,都在把科研样品往可沟通、可复现、可转接的流程里推。Today's common thread is platformization: cleanroom training, pilot-line scaling and packaging facility maps all make research samples easier to discuss, repeat and transfer.

01

Binghamton 新洁净室把教学、研发和封装训练放到一起。Binghamton links cleanroom training with packaging research.

Binghamton University 7 月 2 日宣布开放新的洁净室和微电子封装研究设施,用于先进芯片制造训练,并计划每年覆盖 100 多名学生。对项目沟通的启发是:越来越多科研平台不只提供“设备列表”,还会把入门课程、工艺训练、封装验证和人才培养绑在一起。Binghamton University opened a new cleanroom and microelectronics packaging research facility on July 2 for advanced chip-manufacturing training, with plans to train more than 100 students annually. Research platforms are increasingly combining equipment access, process education, packaging validation and workforce pipelines.

02

TNO 与 ASML 推进 6 英寸 InP 光子芯片 pilot line。TNO and ASML push a 6-inch InP photonic-chip pilot line.

TNO 近期宣布与 ASML 合作,把 ASML 光刻设备和工艺支持接入 Eindhoven High Tech Campus 正在建设的 Photonic Chip Pilot Line,目标是推动 InP 光子芯片从研发走向工业化。光子芯片项目常见难点不是单次曝光,而是版图、对准、刻蚀、金属、电极、耦合和测试之间的连续性。TNO announced a partnership with ASML for its Photonic Chip Pilot Line under construction at Eindhoven High Tech Campus, targeting industrialization of InP photonic chips. For photonics, the hard part is often continuity across layout, alignment, etch, metal, pads, coupling and test.

03

SEMI 继续把先进封装做成可查询的产业地图。SEMI keeps turning advanced packaging into a mapable ecosystem.

SEMI 7 月版 Worldwide Assembly & Test Facility Database 强调覆盖 820 多个全球 IDM 与 OSAT 设施,并带有先进封装信息。这个信号很实用:先进封装越来越不是“最后找一家做封装”,而是要提前判断 die 尺寸、材料、I/O、散热、互连和可交付测试路径能否匹配。SEMI's July edition of the Worldwide Assembly & Test Facility Database tracks more than 820 global IDM and OSAT facilities with advanced-packaging insights. Advanced packaging is becoming a routing problem across die size, materials, I/O, thermal path, interconnect and test deliverables.

一个行业观察Industry Note

“平台”正在替代“万能单机”成为项目成败的关键词。Platforms, not standalone tools, are becoming the key project variable.

同样是光刻,研究样品可能需要电子束曝光、接触式光刻、DUV、套刻或灰度工艺;同样是刻蚀,材料、掩膜、侧壁、选择比和残留都不同。真正影响交期的往往是平台能不能把前后道、表征、返修和样品交接串起来。微纳Hub 做资讯时也会更关注这种“路线判断”和“资源对接”信号,而不是只记设备名字。The same lithography request may imply EBL, contact lithography, DUV, overlay or grayscale exposure; the same etch request can change with material, mask, sidewall, selectivity and residue. Schedule risk often depends on whether a platform can connect front-end steps, metrology, rework and sample handoff.

项目准备提醒Project Prep

找资源前,先把“下一站”写清楚。Before matching resources, write down the next stop.

如果样品后面还要封装、耦合、打线、低温测试、SEM/AFM 计量或二次加工,请在询价时一起说明。建议同步给出版图文件、目标关键尺寸、膜层和基底、样片尺寸、可承受温度/等离子体/清洗液、是否预留解理道或焊盘,以及希望用什么结果验收。只说“能不能做这个结构”,通常会漏掉后续最贵的约束。If the sample later needs packaging, coupling, wire bonding, cryogenic test, SEM/AFM metrology or a second process round, state that at the request stage. Share layout files, critical dimensions, stack, substrate, chip size, thermal/plasma/chemical limits, cleaving streets or pads and acceptance criteria.

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