半导体微纳制造服务平台 Semiconductor Micro/Nano Fabrication

微纳加工 MicroNano Fabrication

面向科研机构、光电企业和半导体团队,提供从版图评审、电子束/DUV/激光直写、刻蚀转移、薄膜与清洗,到 SEM/电学/RF 测试的工艺协同服务。 Integrated process support for research labs, photonic companies and semiconductor teams, from layout review, EBL/DUV/laser lithography and etch transfer to thin films, cleaning, SEM, electrical and RF testing.

EBL 纳米级直写与对准 Nanoscale direct writing
DUV 晶圆级图形化能力 Wafer-level patterning
RIE / DRIE 干法刻蚀与深硅结构 Dry etch and deep silicon
6/8/12" 覆盖多尺寸晶圆与母版加工 Multi-size wafer and master processing
±10 nm 电子束直写精度参考能力 Reference EBL direct-writing precision
110 GHz RF/电学测试能力覆盖 RF and electrical test coverage
3-4 周 典型样品项目交付周期 Typical sample project lead time

把科研版图,稳定推进到可验证样品。 Turning research layouts into verifiable micro/nano devices.

微纳加工聚焦半导体与光电子芯片工艺服务,面向超表面、超透镜、光栅、波导、MEMS、生物芯片、传感器和高精度掩膜板等方向,提供“小批量、多工艺、强验证”的加工支持。 MicroNano Fabrication focuses on semiconductor and optoelectronic chip process services for metasurfaces, metalenses, gratings, waveguides, MEMS, biochips, sensors and high-precision photomasks, with flexible small-batch manufacturing and verification support.

网站内容参考了本地宣传册、英文版资料、去标识商品素材与 SEM/洁净室视觉素材,定位更偏企业官网:专业、克制、面向项目转化。 The site positioning is built from internal brochures, English presentation material, cleaned product visuals, SEM imagery and cleanroom assets: professional, restrained and project-conversion oriented.

Cleanroom semiconductor process equipment

从曝光到测试的工艺链路。 A process chain from lithography to test.

按项目目标匹配工艺路线,减少客户在设备、材料、版图和检测之间反复试错。 Process routes are matched to project goals, reducing iteration across equipment, materials, layouts and metrology.

01

电子束/DUV/激光直写EBL / DUV / Laser Writing

支持纳米级图形、母版、超表面与光栅结构,适配科研样品、小批量验证和晶圆级图形化。For nanoscale patterns, masters, metasurfaces and gratings, covering research samples, pilot runs and wafer-level patterning.

02

刻蚀与图形转移Etching & Pattern Transfer

覆盖 RIE、DRIE、IBE、湿法刻蚀、释放结构与高深宽比结构,服务硅、石英、氮化硅、TiO2 等材料体系。RIE, DRIE, IBE, wet etch, release processes and high-aspect-ratio structures for silicon, quartz, SiN, TiO2 and more.

03

薄膜、Lift-off 与镀膜Films, Lift-off & Coating

支持金、铬、铜、铂、钨等金属薄膜与功能薄膜工艺,适用于电极、传感器、MEMS 和光电子器件。Metal and functional films including Au, Cr, Cu, Pt and W for electrodes, sensors, MEMS and optoelectronic devices.

04

清洗、显影与交付Cleaning, Development & Delivery

面向电子束曝光后的显影、去胶、RCA/湿法清洗、载具转运与样品入盒,保障样品洁净和交付一致性。Development, resist removal, RCA/wet cleaning, carrier transfer and sample packaging after lithography.

05

SEM 与电学/RF 测试SEM, Electrical & RF Testing

可结合 SEM 表征、IV/CV、RF、噪声分析与探针台测试,为工艺窗口、良率和器件性能提供数据依据。SEM, IV/CV, RF, noise analysis and probe-station testing support process windows, yield review and device performance checks.

06

AOI/自动化检测设备AOI & Automation Equipment

可延展至晶圆、PCB、芯粒、PD、光波导片等外观缺陷检测与自动化测试设备方案。Extensible to AOI and automation solutions for wafers, PCB substrates, dies, PD chips and optical waveguide sheets.

能力矩阵Capability Matrix

按材料、结构、尺寸和测试目标组合工艺。Combining processes by material, structure, size and test target.

材料体系Materials Si, SOI, Quartz, TiO2, Si3N4, AlN, Ge, Au/Al/Ti
典型结构Structures 纳米柱、深硅槽、闪耀/斜齿光栅、微透镜阵列、波导、MEMS 梁Nano-pillars, deep silicon trenches, blazed/slanted gratings, MLA, waveguides, MEMS beams
工艺节点Process Nodes EBL 50-200 nm, DUV 200 nm, Stepper 500 nm, Laser writing 800 nm
验证输出Verification SEM 图、尺寸偏差、深度/侧壁形貌、测试曲线、工艺建议SEM images, CD deviation, depth/sidewall morphology, test curves and process recommendations

典型加工方向。 Representative applications.

从光学超构表面到 MEMS 深硅结构,案例展示以工艺能力和可验证结果为核心。 From optical metasurfaces to MEMS deep silicon structures, cases focus on process capability and verifiable outputs.

SEM image of deep silicon trenches
MEMS / DRIE

深硅刻蚀与 MEMS 结构Deep Silicon Etch and MEMS

SEM image of nanoscale grating array
Grating Master

刻线、闪耀与斜齿光栅母版Ruled, Blazed and Slanted Gratings

SEM cross-section of device structure
Device Cross-section

光波导、掩膜板与器件断面Waveguides, Photomasks and Cross-sections

项目推进流程。Project workflow.

01

需求评审Requirement Review

确认材料、版图、目标 CD、深度、晶圆尺寸、交付数量和测试要求。Confirm material, layout, target CD, depth, wafer size, quantity and test goals.

02

工艺设计Process Design

选择曝光、显影、刻蚀、镀膜、Lift-off、清洗和检测组合。Select lithography, development, etch, coating, lift-off, cleaning and inspection steps.

03

加工执行Fabrication

按工艺窗口推进样品,关键步骤保留过程记录和异常反馈。Run samples through the process window with records and exception feedback.

04

表征交付Verification

输出 SEM/测试数据、样品入盒、交付说明和下一轮优化建议。Deliver SEM/test data, packaged samples, notes and next-round optimization suggestions.

技术动态与应用笔记。Technical updates and application notes.

超表面/超透镜样品加工方案升级Metasurface and metalens sample process upgrade

围绕 TiO2、SiN、SOI、Ge 等材料,梳理不同波段的工艺节点和 SEM 验证策略。Process nodes and SEM verification strategy for TiO2, SiN, SOI and Ge across UV, VIS, NIR and MIR bands.

微纳结构刻蚀窗口与侧壁质量控制Etch window and sidewall quality control

以深硅槽、纳米柱、光栅母版为例,评估深宽比、侧壁粗糙度、残胶和清洗对成品的影响。A review of aspect ratio, sidewall roughness, residue and cleaning for trenches, nano-pillars and grating masters.

从科研样品到小批量验证的交付清单Checklist from research sample to pilot validation

建议客户在项目初期同步准备版图文件、材料参数、目标尺寸、公差、测试方式和交付节奏。Recommended early-stage inputs: layout files, material parameters, target dimensions, tolerance, tests and delivery rhythm.

联系我们Contact

把材料、版图和目标结构发来,我们一起评估工艺路线。Send material, layout and target structure details, and we will review the process route together.

建议包含:材料体系、晶圆/样品尺寸、目标线宽或周期、刻蚀深度、数量、是否需要 SEM/电学/RF 测试、期望交付时间。 Recommended inputs: material system, wafer/sample size, target CD or period, etch depth, quantity, SEM/electrical/RF test needs and expected delivery date.