每日轻资讯Daily Notes
从材料会议、面板级光刻到纳米平台：今天三个资源信号。From materials meetings and panel lithography to nanofab platforms: three resource signals.
今天几条信息都指向同一个现实：微纳项目越来越需要把材料、图形、后道和表征放在同一张路线图里判断，而不是只问某一步能不能做。Today's signals point to one practical theme: micro-nano projects increasingly need material, patterning, back-end and metrology choices on one route map.
SEMI SMC 2026 把材料创新放到“从实验室到量产”语境里。SEMI SMC 2026 frames materials as a lab-to-fab problem.
SEMI Strategic Materials Conference 将于 7 月 13-15 日在 San Jose 举行，议题覆盖 AI 系统材料、先进封装与材料集成、从 Labs to Fabs 的规模化导入、量子与新兴器件。对科研样品来说，这提醒我们别只描述结构尺寸，还要把材料来源、沉积方式、热预算、清洗兼容性和后续封装约束一起写清楚。SEMI's Strategic Materials Conference runs July 13-15 in San Jose, with tracks on scalable AI-system materials, advanced packaging and materials integration, lab-to-fab deployment, and quantum or emerging devices. For research samples, material source, deposition path, thermal budget, cleaning compatibility and packaging constraints matter as much as dimensions.
Nikon 发展面向先进封装的 1.5 um 数字光刻系统。Nikon is developing 1.5 um digital lithography for advanced packaging.
Nikon 6 月发布的新系统面向半导体后道先进封装，目标分辨率为 1.5 um L/S，并把 510 x 515 mm 基板吞吐量目标提高到每小时 65 片以上。它的价值不只是“更快曝光”，而是 maskless 路线可以减少光掩模准备时间，适合多版本中介层、FC-BGA 基板和面板级封装图形验证。Nikon's June announcement describes a back-end advanced-packaging digital lithography system targeting 1.5 um L/S resolution and 65 or more 510 x 515 mm panels per hour. The maskless route is relevant for faster iterations of interposers, FC-BGA substrates and panel-level packaging patterns.
University of Arizona 纳米加工平台强调培训、远程加工和可行性判断。University of Arizona highlights training, remote processing and feasibility review.
University of Arizona 近期介绍其翻新的 Nanofabrication Core Facility：洁净室由约 2,800 平方英尺扩展到约 6,800 平方英尺，维持 ISO 5 标准，并提供培训、设备预约、工作人员支持和远程寄样加工选项。这个模式很接近真实项目需求：先判断可行性，再决定是自助上机、平台代工，还是转接到更合适的资源。The University of Arizona described its renovated Nanofabrication Core Facility, expanded from about 2,800 to 6,800 square feet while maintaining ISO 5 standards, with training, scheduling, staff support and a remote send-in processing option. That is close to how real projects move: feasibility first, then self-use, staff processing or resource transfer.
一个行业观察Industry Note
先进封装正在把“微米级图形”重新拉回焦点。Advanced packaging is pulling micron-scale patterning back into focus.
很多人一提光刻就想到更小线宽，但先进封装里常见问题是大面积、厚胶、翘曲、对准、RDL、焊盘和介质层之间的综合窗口。1 um、1.5 um、几微米并不“低端”，它们可能直接决定中介层、扇出封装、玻璃基板或光电耦合样品能不能稳定交付。微纳Hub 做路线判断时，也会把分辨率、面积、基板尺寸、套刻和后续表征放在一起看。In advanced packaging, the challenge is often not the smallest possible linewidth; it is the combined window across large area, thick resist, warpage, overlay, RDL, pads and dielectrics. Micron-scale patterning can decide whether interposers, fan-out packages, glass substrates or optoelectronic samples are practical.
项目准备提醒Project Prep
材料和验收方式要比“想做什么图形”更早说。State materials and acceptance criteria before only describing the pattern.
提交需求时，建议同时给出材料体系、膜厚、基底尺寸、是否有预处理或已有器件、目标关键尺寸和容差、可接受的清洗/烘烤/等离子体条件、是否需要 SEM/AFM/台阶仪数据，以及最终是看形貌、阻值、透过率、耦合效率还是封装连通性。前期信息越完整，越容易判断该走电子束曝光、接触式光刻、激光直写、数字光刻还是先做工艺试片。Share the stack, film thickness, substrate size, pre-existing devices, critical dimensions and tolerance, allowed clean/bake/plasma conditions, required SEM/AFM/profilometer data and final acceptance metric. That makes it easier to choose EBL, contact lithography, laser direct writing, digital lithography or a process coupon first.