每日轻资讯Daily Notes
从先进封装、智能制造到开放纳米平台：今天三个协同接口信号。From advanced packaging and smart manufacturing to open nanofabs: three coordination-interface signals.
近期公开信号指向同一件事：器件缩小只是起点，真正决定项目能否推进的是设计、工艺、封装、量测和人员能力能否在同一套接口里协同。Recent public signals point in one direction: device scaling is only the start. Progress depends on whether design, process, packaging, metrology and people can coordinate through one shared interface.
SEMI 把先进封装视为从节点缩放转向系统集成的关键路径。SEMI frames advanced packaging as a key path from node scaling to system integration.
SEMI 8 月课程强调，当光刻缩放接近物理边界，竞争重点会转向芯片如何集成与封装。对微纳项目而言，芯片尺寸、键合界面、互连方式、热预算和测试结构应在版图冻结前共同确认。SEMI's August course stresses that as lithographic scaling approaches physical limits, competition shifts toward chip integration and packaging. For micro/nano projects, die size, bonding interfaces, interconnects, thermal budget and test structures should be confirmed before layout freeze.
SEMICON Taiwan 2026 把 AI 智能制造与先进封装同时列为增长重点。SEMICON Taiwan 2026 highlights both AI-driven manufacturing and advanced packaging.
SEMI 公布的主题覆盖 AI 视觉检测、智能工厂集成、3DIC、FOPLP 与芯粒。值得项目端借鉴的不是追逐名词，而是提前定义数据采集点、缺陷分类、对准公差和封装后验收，让工艺数据能支持下一轮决策。SEMI's themes span AI visual inspection, smart-factory integration, 3DIC, FOPLP and chiplets. The practical lesson is to define data points, defect classes, alignment tolerances and post-package acceptance early so process data can guide the next decision.
NSF 的 NQNI 计划强调开放微纳设施、培训与外部用户接口。NSF's NQNI program emphasizes open facilities, training and external-user access.
NQNI 计划面向缺少先进微纳加工与表征条件的科研和企业用户，覆盖异质集成、先进封装、三维纳米系统、原型与测试。共享平台能否高效使用，取决于来料状态、工艺边界、培训要求和数据交付是否在进场前说清楚。NQNI targets research and business users lacking advanced fabrication and characterization access, spanning heterogeneous integration, packaging, 3D nanosystems, prototyping and test. Efficient shared-facility work depends on defining incoming material, process limits, training and data delivery before arrival.
一个工艺观察Process Note
协同接口不是会议纪要，而是一组可验证、可交接的工程字段。A coordination interface is a verifiable handoff, not meeting notes.
建议把版图版本、材料堆栈、关键尺寸、对准标记、热预算、表面状态、测试结构、数据格式和判废规则放进同一张接口表。每次换平台或批次时，都能据此判断哪些参数可调、哪些边界不可越过。Put layout revision, material stack, critical dimensions, alignment marks, thermal budget, surface state, test structures, data format and reject rules into one interface sheet. It then becomes possible to distinguish tunable parameters from hard limits across platforms and lots.
项目准备提醒Project Prep
在询价或进场前，提交一页“设计—加工—封装—测试”接口表。Before quoting or facility entry, submit a one-page design–fab–package–test interface sheet.
至少包含文件版本、基底与膜层、最小线宽/间距、套刻精度、最大温度、正反面禁区、切割与键合方式、测试环境和验收指标。微纳Hub 可据此拆分资源、识别冲突并预留验证结构。Include file revision, substrate and films, minimum linewidth/spacing, overlay, maximum temperature, keep-out zones, dicing and bonding method, test environment and acceptance metrics. MN Fab Hub can use it to route resources, identify conflicts and reserve validation structures.