每日轻资讯Daily Notes
从量子制造、300 mm 光子平台到混合波导：今天三个系统集成信号。From quantum manufacturing and 300 mm photonics to hybrid waveguides: three system-integration signals.
近期公开信息共同指向一件事：器件从单点性能走向系统，需要材料、晶圆平台、异质接口与量测方法一起进入设计输入。Recent signals point to one lesson: moving from device performance to a system requires materials, wafer platforms, heterogeneous interfaces and metrology to become shared design inputs.
NSF 把“可制造、可恢复”的超导量子器件列为独立攻关方向。NSF makes manufacturable, resilient superconducting quantum devices a dedicated research direction.
NSF 8 月 25 日宣布八个量子研究机构获得合计超过 2.9 亿美元支持，其中 MARQUIS 将结合材料科学与半导体制造，改进超导量子系统关键的约瑟夫森结。对量子芯片项目，这意味着材料批次、结区工艺、低温性能和失效统计要从样片阶段就形成同一套可追溯记录。On August 25, NSF announced more than $290 million for eight quantum institutes. MARQUIS will combine materials science and semiconductor fabrication to improve Josephson junctions. Quantum-chip projects should trace material lots, junction processing, cryogenic performance and failure statistics from the first coupons.
Fraunhofer IPMS 把 SiN 光子平台推进到 200/300 mm 与晶圆级异质集成。Fraunhofer IPMS advances SiN photonics across 200/300 mm wafers and wafer-level heterogeneous integration.
Fraunhofer IPMS 8 月 25 日介绍其可见光到中红外低损耗 SiN 波导平台，可用于 200 和 300 mm 晶圆，并面向光子计算、量子技术、传感以及与激光器等主动器件的混合集成。项目准备不能只交波导版图，还应同步定义耦合方式、主动器件接口、热预算、晶圆级测试结构与封装基准。Fraunhofer IPMS described its low-loss SiN platform spanning visible to mid-infrared wavelengths on 200 and 300 mm wafers, with routes toward sensing, computing, quantum systems and active-device integration. A project needs coupling, active interfaces, thermal budget, wafer test structures and packaging references—not only a waveguide layout.
Fraunhofer HHI 用多模聚合物波导扩大混合光子集成的耦合窗口。Fraunhofer HHI uses multimode polymer waveguides to widen the coupling window for hybrid photonics.
Fraunhofer HHI 8 月 25 日为 PolyBoard 增加多模波导，截面最高可到 500 µm × 500 µm、典型数值孔径 0.5，并可与 SiN、薄膜铌酸锂及 InP、GaAs、GaN 主动器件组合。更大的耦合容差并不等于接口可以模糊；光斑、NA、功率、对准基准和胶层厚度仍需明确验收。Fraunhofer HHI added multimode PolyBoard waveguides with cross-sections up to 500 µm × 500 µm and a typical NA of 0.5, alongside SiN, TFLN and InP/GaAs/GaN elements. Greater coupling tolerance still requires explicit acceptance for mode size, NA, power, alignment references and adhesive thickness.
一个工艺观察Process Note
系统集成的第一份图，不该只是器件版图，而应是接口地图。The first system-integration drawing should be an interface map, not only a device layout.
把材料平台、晶圆尺寸、层间工艺、光电接口、温度边界、对准基准、测试结构和封装路径画在同一张图上，才能尽早发现“器件能做、系统接不上”的风险。Put material platform, wafer size, layer sequence, optical/electrical interfaces, thermal limits, alignment marks, test structures and packaging route on one map to expose system-level incompatibilities early.
项目准备提醒Project Prep
询价前补齐“芯片—耦合—封装—测试”四段接口表。Before quoting, complete a chip–coupling–package–test interface table.
至少写明材料与晶圆平台、关键尺寸和层厚、输入输出模式、允许功率与温度、对准公差、焊盘/光纤/连接器形式、测试温区、对照片和最终判定指标。微纳Hub 可据此判断哪些接口需要先做测试片或分阶段验证。Specify materials and wafer platform, critical dimensions and layers, I/O modes, power and temperature limits, alignment tolerance, pad/fiber/connector format, test temperatures, controls and acceptance metrics. MN Fab Hub can then identify interfaces needing coupons or staged verification.