每日资讯Daily Notes
从面板级封装镀膜到供应链协同：把通孔薄膜与检验点一起对齐From panel-level packaging films to supply-chain coordination: align via films with inspection checkpoints
依据 VON ARDENNE 与 SEMI 的公开资料整理。机构或厂商披露，与微纳Hub的项目准备建议明确区分。Based on public material from VON ARDENNE and SEMI. Vendor and association disclosures are kept distinct from MN Fab Hub project-preparation advice.
面板级封装：通孔薄膜需要同时看覆盖与后段接口Panel-level packaging: via films need coverage and downstream interfaces considered together
VON ARDENNE 于 10 月 13 日介绍其把 HiPIMS 镀膜用于面板级封装的方案，目标是在通玻璃通孔（TGV）中沉积高深宽比的阻挡层和种子层，并强调大面积基板上的膜性能与均匀性。该披露描述的是设备与工艺方案，不等于任一基板、孔型、材料组合或量产线已经完成资格认证。On October 13, VON ARDENNE described a HiPIMS approach for panel-level packaging, targeting barrier and seed layers in high-aspect-ratio through-glass vias (TGVs) and emphasizing film performance and uniformity on large-area substrates. This describes an equipment and process approach, not qualification of every substrate, via geometry, material stack or production line.
产业协同：先进制造议题仍要落实到可交换的工艺信息Ecosystem coordination: advanced-manufacturing themes still need exchangeable process data
SEMI 为 10 月 13—15 日 SEMICON West 公布的议程，包含先进制造、先进封装与异构集成、供应链韧性等议题。它说明这些接口正在被行业共同讨论；但展会或议程不构成对某一家供应商能力、排期、成本或良率的承诺。SEMI's agenda for SEMICON West on October 13–15 includes advanced manufacturing, advanced packaging and heterogeneous integration, and supply-chain resilience. It shows these interfaces are being discussed across the industry; an event or agenda is not a commitment on any supplier's capability, queue, cost or yield.
一个工艺观察Process Note
把“通孔镀得上”拆成可量测的截面与电性证据Turn “the via can be coated” into measurable cross-section and electrical evidence
微纳Hub编辑观察：对于 TGV、TSV 或其他高深宽比结构，薄膜方案不能只以名义厚度表述。建议将基板材料与尺寸、孔径/深度和侧壁状态、前处理、阻挡层/种子层材料与目标厚度、孔口—中段—孔底抽样位置、截面/片阻/附着力等量测方法、后续电镀或互连兼容性，以及失效判据写在同一份工艺计划中。这样才可区分设备宣称、样片读数与可复核的工艺结论。MN Fab Hub editorial note: for TGV, TSV or other high-aspect-ratio structures, a film plan should not stop at nominal thickness. Keep substrate material and size, via geometry and sidewall condition, pretreatment, barrier/seed material and targets, top/middle/bottom sampling, cross-section/sheet-resistance/adhesion methods, downstream plating or interconnect compatibility, and failure criteria in one plan.
项目准备提醒Project Prep
先确认样片、量测、后段和交付的责任边界Confirm responsibility boundaries for samples, metrology, downstream steps and delivery
提交面板级封装、玻璃通孔或大面积镀膜需求时，可先提供基板图纸与版本、孔型和公差、材料堆栈、允许的热预算和污染限制、需要的薄膜/电性/截面证据、后续工艺接口、样片数量与交付格式。公开行业消息可用于形成问题清单，但不能替代针对具体资源方的书面工艺与排期确认。微纳Hub可协助将未知项整理为可沟通的需求包。For panel-level packaging, through-glass-via or large-area film requests, start with substrate drawings and revision, geometry and tolerance, material stack, thermal budget and contamination limits, required film/electrical/cross-section evidence, downstream interfaces, sample count and delivery format. Public industry news can frame the questions, but cannot replace written process and scheduling confirmation from a specific provider.
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